[new version of rshift using unaligned loads and not overshooting.  2.0c/l Conroe, but 2.5c/l Harpertown
peter@cordes.ca**20080319040110] {
hunk ./rshift.asm 127
-PROLOGUE(mpn_rshift_sse2)
+PROLOGUE(mpn_rshift_sse2_aligned)
hunk ./rshift.asm 199
+
+EPILOGUE()
+
+
+
+C version using unaligned loads but aligned stores:
+C K8 (2.6 GHz)
+C size 1:	16.926	c/l
+C size 2:	8.470	c/l
+C size 3	7.638	c/l (no ALIGN: 7.309)
+C size 4:	5.736	c/l (no ALIGN: 5.731)
+C size 5:	5.777	c/l
+C size 6:	4.813	c/l
+C size 8:	4.358	c/l (no ALIGN: 4.607)
+C size 496:	3.052	c/l. (no ALIGN: 3.547) old: 3.039c/l with store commented out.
+C size 10000	5.244	c/l (no ALIGN: 5.257)
+C size 10000000	14.053	c/l. (no ALIGN: 14.529)
+
+C Conroe:
+C size 1	12.096	c/l
+C size 2	6.504	c/l
+C size 3	5.376	c/l  (no ALIGN: 5.312)
+C size 4	4.040	c/l  (no ALIGN: 3.980, and one less icache line touched?)
+C size 5	4.013	c/l
+C size 6	3.341	c/l
+C size 8	2.988	c/l  (no ALIGN: 2.988)
+C size 496:	2.052	c/l. (no ALIGN: 2.052)
+C size 10000	2.320	c/l  (no ALIGN: 2.320)
+C size 10000000 11.178  c/l. (no ALIGN: 11.195)  (2.4GHz, g965, dual channel DDR800)
+
+
+C Harpertown (2.8GHz):
+C size 1	12.115	c/l.
+C size 2	6.524	c/l
+C size 3	5.444	c/l (no ALIGN: 5.289)
+C size 4	4.083	c/l (no ALIGN: 3.961)
+C size 5	4.217	c/l
+C size 6	3.512	c/l
+C size 8	3.229	c/l. (no ALIGN: 3.134)
+C size 496	2.581	c/l. (no ALIGN: 2.558)
+C size 10000	2.847	c/l  (no ALIGN: 2.968)
+C size 10000000	14.460	c/l. (no ALIGN: 14.403)
+
+C TODO: test this with electric fence to see if it goes off the end.
+
+ASM_START()
+PROLOGUE(mpn_rshift_sse2)
+	movq	(%rsi), %xmm7		C %7 = limb0
+	movd	%ecx, %xmm1
+	sub	$64, %ecx		C cnt must be <=64, so it's ok to operate on small version of it
+	neg	%ecx			C we want 64-cnt in ecx as a shift count for getting the return value
+	movq	%xmm7, %rax		C %rax = limb0
+ 	movd	%ecx, %xmm0		C %0=64-cnt=left count=lc; %1=cnt;  C this can go anywhere before the loop.
+	shlq	%cl, %rax		C return value=limb0<<lc. shift count has to be in %cl.	 C modifies flags, so it has to go before the loop
+
+	leaq	(%rsi,%rdx,8), %rsi     C rsi = rsi + rdx*8 = last limb + 1
+	leaq	-16(%rdi,%rdx,8), %rdi	C rdi = rdi + rdx*8 - 16 = last limb - 1
+	negq	%rdx
+C rsi=last srclimb+1; rdi=last destlimb+1; rdx=-n; %0=64-cnt; %1=cnt;
+C %7=limb0;
+C	xor	%ecx, %ecx		C can clear rcx here or later with mov
+	addq	$2, %rdx		C n= -n + 2
+	jge	L(unal_out)			C skip the loop if n<=2
+
+C	ALIGN(16)			C No alignment needed on Core 2.  This makes n even case only 128B of instructions.
+L(unal_loop):
+	movq	-8(%rsi,%rdx,8), %xmm6	C %6 = limb1
+	movdqa	%xmm7,	%xmm3
+	punpcklqdq %xmm6, %xmm3
+	psrlq	%xmm1,	%xmm3
+
+	movq	(%rsi,%rdx,8), %xmm7	C %7 = limb2
+	punpcklqdq %xmm7, %xmm6
+	psllq	%xmm0,	%xmm6
+
+	por	%xmm3,	%xmm6
+	movdqa	%xmm6,	(%rdi,%rdx,8) C store the result.
+
+C	movq	8(%rsi,%rdx,8),	%xmm6	C %6 = limb3  (about to become limb1)
+	addq	$2,	%rdx
+	jl	L(unal_loop)
+
+L(unal_out):
+C %6=limb1; %7=limb0
+C It's actually faster to mov $0 here instead of an xor before the loop.  It saves a ~0.2 cycles/limb on n=4.  It does make the function bigger.
+	mov	$0, %ecx		C need to preserve the condition codes if we clear rcx here.
+	cmovng	-8(%rsi,%rdx,8), %rcx
+	movq	%rcx, %xmm6		C %6 = limb1, or 0 if we're off the end of the array.  (can't be garbage because it gets ORed with the result we want)
+
+	punpcklqdq %xmm6, %xmm7
+	psllq	%xmm0,	%xmm6
+	psrlq	%xmm1,	%xmm7
+	por	%xmm7,	%xmm6
+	jg	L(unal_endodd)			C n = 1 limb left 	C condition flags still set from loop counter
+	movdqa	%xmm6, (%rdi)	C store the result.
+	ret
+
+L(unal_endodd):
+	movq	%xmm6, 8(%rdi)		C an odd limb to store
+	ret
}